Silicon complementary metal oxide semiconductor (“CMOS”) technology is a dominant microelectronic technology. CMOS offers high reliability, high levels of integration, low power dissipation, and is very cost-effective. For lower frequency applications CMOS will most likely remain the dominant technology. However, electron and hole mobility in silicon limits the extent to which CMOS devices can be utilized for higher speed applications such as radars and mobile communication devices that require high transistor switching rates.
One historical solution has been to use semiconductor compounds instead of elemental semiconductors such as Group IV silicon and germanium. These compounds can be binary, tertiary, and quanternary combinations of Group II (Zn and Cd), Group III (B, Al, Ga, and In), Group IV (C, Si, and Ge), Group V (P, As, and Sb) and Group VI (S, Se, and Te) elements. Common III-V semiconductors include Gallium Arsenide (GaAs), Gallium Phosphide (GaP), and Indium Phosphide (InP). Gallium Arsenide, in particular, has widespread use as a source of and sensor to near infrared light given its 1.43 electron volt (“eV”) band gap and as the primary semiconductor for high speed electronic devices. Despite the speed improvements over silicon CMOS devices, GaAs is for most applications cost prohibitive. One estimate indicates that per square millimeter in 1995 dollars, silicon CMOS has a $0.01 cost while GaAs epitaxy has a $2.00 cost.
A newer approach, and one that offers the speed benefits of GaAs and improved cost-effectiveness of silicon CMOS, employs silicon germanium (strained or unstrained, usually denoted more precisely by Si1-xGex or simply as SiGe) and/or strained silicon. Germanium has a 4.2% larger lattice constant (e.g., atomic spacing) than silicon. Silicon germanium also has a larger lattice constant, the extent of which depends on the percentage composition of germanium. When silicon is grown on silicon germanium, under proper conditions the silicon lattice stretches to match that of the silicon germanium at the silicon/silicon germanium interface. When silicon germanium is grown on silicon, under proper conditions the silicon germanium lattice gets compressed. For each method, there is critical thickness of the grown layer (be it silicon or silicon germanium) past which the grown layer relaxes as lattice defects propagate.
There are two reasons why strained silicon and silicon germanium offer improved speed characteristics for transistors comprised thereof. Compared to elemental silicon, germanium has a lower electron effective mass and lower hole effective mass (leading to higher electron mobility and higher hole mobility). Silicon germanium compounds benefit from the increased mobilities of the constituent germanium. Further, the induced strain in silicon or silicon germanium (tension and compression respectively) creates an anisotropic structure that alters the conduction and valence bands of the materials. When combined with other semiconductor layers (e.g., heterolayers) with different band gaps, conduction band and valence band discontinuities can be designed to create quantum wells or built-in electric fields to accelerate carriers across the heterolayers.
Silicon germanium deposition can be incorporated into CMOS process flows relatively easily. For example, the only major increase in cost is the addition of a silicon germanium epitaxy step. Given the ease of integration and the band gap engineering possible with silicon germanium (e.g., bulk silicon, bulk silicon germanium, and strained variants of each) the possibility of manufacturing an entire system on one silicon or silicon on insulator (“SOI”) substrate is real. Integrated systems could include fiber optic connections, waveguides, optical detectors, CMOS, heterojunction bipolar transistors, and quantum devices all on the same chip.
Simply using strained silicon and/or silicon germanium does not render immediately superior devices. As with all paradigm shifts, incorporating strained silicon and silicon germanium into current semiconductor processing flows creates a new set of problems to solve.